Mask assembly, apparatus, and method of manufacturing display device using the mask assembly

ABSTRACT

Provided is a mask assembly, an apparatus, and a method of manufacturing a display apparatus using such mask assembly and apparatus. The mask assembly deposits a deposition material on a first pixel among a plurality of pixels disposed on a device substrate and including the first pixel and a second pixel includes a mask substrate, a molding layer stacked on the mask substrate and including a hole corresponding to a position of the second pixel, a blocking plate detachably mounted in the hole and configured to block the second pixel from the deposition material by covering the second pixel when the blocking plate is detached from the hole.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a Divisional of U.S. patent application Ser. No.15/689,421, filed on Aug. 29, 2017, which is a Divisional of U.S. patentapplication Ser. No. 15/183,375, filed on Jun. 15, 2016, now issued asU.S. Pat. No. 9,786,844, and claims priority from and the benefit ofKorean Patent Application No. 10-2015-0181848, filed on Dec. 18, 2015,which is hereby incorporated by reference for all purposes as if fullyset forth herein.

BACKGROUND Field

Exemplary embodiments relate to an apparatus and method. Moreparticularly, exemplary embodiments relate to a mask assembly that maydisplay high-resolution deposition patterns regardless of a size of amask for deposition, and an apparatus and method of manufacturing adisplay device using the mask assembly.

Discussion of the Background

In general, among flat displays, an organic light-emitting displaydevice is an active light-emissive display device and has wide viewingangles and excellent contrast. In addition, the organic light-emittingdisplay device may be driven by a low voltage, and be light and thinwhile having a high response rate. Thus, organic light-emitting displaydevices have drawn attention as next-generation display devices.

An organic layer and/or an electrode of the organic light-emittingdisplay device may be manufactured by a vacuum deposition method.However, as the resolution of the organic light-emitting display deviceincreases, a mask that is used in the deposition process is required tobe larger, and the width of open slits in the mask and distribution ofthe open slits are required to decrease.

However, as a size of a mask for deposition according to the related artincreases, the mask is divided into a plurality of numbers andtension-welded to a separate frame. Thus, a process of manufacturing themask is complicated, and the mask has to be periodically replaced inorder to prevent deposition defects due to transformation of depositionpatterns.

The above information disclosed in this Background section is only forenhancement of understanding of the background of the inventive concept,and, therefore, it may contain information that does not form the priorart that is already known in this country to a person of ordinary skillin the art.

SUMMARY

Exemplary embodiments include a mask assembly, and an apparatus andmethod of manufacturing a display device using the mask assembly.

Additional aspects will be set forth in part in the description whichfollows, and, in part, will be apparent from the disclosure, or may belearned by practice of the inventive concept.

According to an exemplary embodiment, a mask assembly includes a masksubstrate configured to deposit a deposition material on a first pixeldisposed on a device substrate comprising the first pixel and a secondpixel, a molding layer stacked on the mask substrate and comprising ahole corresponding to a position of the second pixel disposed on thedevice substrate, and a blocking plate detachably mounted in the holeand configured to block the second pixel from the deposition material bycovering the second pixel when the blocking plate is detached from thehole.

According to an exemplary embodiment, an apparatus for manufacturing adisplay device includes a mask assembly configured to deposit adeposition material on a first pixel disposed on a device substratecomprising the first pixel and a second pixel, a first magnetic memberconfigured to ascend above the device substrate, and a second magneticmember configured to ascend below the mask assembly.

The mask assembly includes a mask substrate, a molding layer stacked onthe mask substrate, the molding layer including a hole corresponding toa position of the second pixel disposed on the device substrate, and ablocking plate detachably mounted in the hole and configured to blockthe second pixel from the deposition material by covering the secondpixel when the blocking plate is detached from the hole. The firstmagnetic member is configured to pull the blocking plate from the holeto the second pixel, and the second magnetic member is configured topull the blocking plate from the second pixel to the hole.

According to an exemplary embodiment, a method of manufacturing adisplay device includes providing a device substrate, providing a maskassembly, mounting the blocking plate on the pixel-defining layersurrounding the second pixel to block a deposition material from beingdeposited on the second pixel, depositing the deposition material on theexposed first electrode of the first pixel, and separating the blockingplate from the second pixel. The first pixel includes a first electrode,a second pixel, and a pixel-defining layer partially exposing firstelectrode of the first pixel. The mask assembly includes a masksubstrate, a molding layer stacked on the mask substrate and comprisinga hole corresponding to a position of the second pixel, and a blockingplate detachably mounted in the hole.

The foregoing general description and the following detailed descriptionare exemplary and explanatory and are intended to provide furtherexplanation of the claimed subject matter.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a furtherunderstanding of the inventive concept, and are incorporated in andconstitute a part of this specification, illustrate exemplaryembodiments of the inventive concept, and, together with thedescription, serve to explain principles of the inventive concept.

FIG. 1 is a schematic perspective view of a device substrate on which amask assembly according to an exemplary embodiment and a depositionmaterial are to be deposited.

FIG. 2 is a partial cross-sectional view that schematically illustratesa blocking plate of FIG. 1 covering a second pixel of the devicesubstrate.

FIG. 3 is a schematic conceptual diagram of an apparatus formanufacturing a display device using the mask assembly of FIG. 1.

FIG. 4, FIG. 5, FIG. 6, and FIG. 7 are partial cross-sectional viewsthat sequentially illustrate the blocking plate of FIG. 1 covering thesecond pixel.

FIG. 8 and FIG. 9 are partial cross-sectional views that schematicallyillustrate the blocking plate of FIG. 1 being separated from the secondpixel.

FIG. 10 is a perspective plan view that schematically illustrates theblocking plate of FIG. 1 covering each second pixel.

FIG. 11 is a plan view of a modified example of FIG. 10.

FIG. 12 is a plan view of another modified example of FIG. 10.

FIG. 13 is a plan view of another modified example of FIG. 10.

FIG. 14 is a schematic perspective view of a mask assembly including ablocking plate illustrated in FIG. 13.

FIG. 15 is a plan view of a modified example of FIG. 13.

FIG. 16 is a plan view of a modified example of a blocking plateillustrated in FIG. 2.

FIG. 17 is a schematic perspective view of a mask assembly including ablocking plate illustrated in FIG. 16.

FIG. 18 is a plan view of a display device manufactured by using anapparatus for manufacturing a display device, illustrated in FIG. 7.

FIG. 19 is a cross-sectional view taken along line XIX-XIX′ of FIG. 18.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

In the following description, for the purposes of explanation, numerousspecific details are set forth in order to provide a thoroughunderstanding of various exemplary embodiments. It is apparent, however,that various exemplary embodiments may be practiced without thesespecific details or with one or more equivalent arrangements. In otherinstances, well-known structures and devices are shown in block diagramform in order to avoid unnecessarily obscuring various exemplaryembodiments.

In the accompanying figures, the size and relative sizes of layers,films, panels, regions, etc., may be exaggerated for clarity anddescriptive purposes. Also, like reference numerals denote likeelements.

When an element or layer is referred to as being “on,” “connected to,”or “coupled to” another element or layer, it may be directly on,connected to, or coupled to the other element or layer or interveningelements or layers may be present. When, however, an element or layer isreferred to as being “directly on,” “directly connected to,” or“directly coupled to” another element or layer, there are no interveningelements or layers present. For the purposes of this disclosure, “atleast one of X, Y, and Z” and “at least one selected from the groupconsisting of X, Y, and Z” may be construed as X only, Y only, Z only,or any combination of two or more of X, Y, and Z, such as, for instance,XYZ, XYY, YZ, and ZZ. As used herein, the term “and/or” includes any andall combinations of one or more of the associated listed items.

Although the terms “first,” “second,” etc. may be used herein todescribe various elements, components, regions, layers, and/or sections,these elements, components, regions, layers, and/or sections should notbe limited by these terms. These terms are used to distinguish oneelement, component, region, layer, and/or section from another element,component, region, layer, and/or section. Thus, a first element,component, region, layer, and/or section discussed below could be termeda second element, component, region, layer, and/or section withoutdeparting from the teachings of the present disclosure.

Spatially relative terms, such as “beneath,” “below,” “lower,” “above,”“upper,” and the like, may be used herein for descriptive purposes, and,thereby, to describe one element or feature's relationship to anotherelement(s) or feature(s) as illustrated in the drawings. Spatiallyrelative terms are intended to encompass different orientations of anapparatus in use, operation, and/or manufacture in addition to theorientation depicted in the drawings. For example, if the apparatus inthe drawings is turned over, elements described as “below” or “beneath”other elements or features would then be oriented “above” the otherelements or features. Thus, the exemplary term “below” can encompassboth an orientation of above and below. Furthermore, the apparatus maybe otherwise oriented (e.g., rotated 90 degrees or at otherorientations), and, as such, the spatially relative descriptors usedherein interpreted accordingly.

The terminology used herein is for the purpose of describing particularembodiments and is not intended to be limiting. As used herein, thesingular forms, “a,” “an,” and “the” are intended to include the pluralforms as well, unless the context clearly indicates otherwise. Moreover,the terms “comprises,” “comprising,” “includes,” and/or “including,”when used in this specification, specify the presence of statedfeatures, integers, steps, operations, elements, components, and/orgroups thereof, but do not preclude the presence or addition of one ormore other features, integers, steps, operations, elements, components,and/or groups thereof.

Various exemplary embodiments are described herein with reference tosectional illustrations that are schematic illustrations of idealizedexemplary embodiments and/or intermediate structures. As such,variations from the shapes of the illustrations as a result, forexample, of manufacturing techniques and/or tolerances, are to beexpected. Thus, exemplary embodiments disclosed herein should not beconstrued as limited to the particular illustrated shapes of regions,but are to include deviations in shapes that result from, for instance,manufacturing. For example, an implanted region illustrated as arectangle will, typically, have rounded or curved features and/or agradient of implant concentration at its edges rather than a binarychange from implanted to non-implanted region. Likewise, a buried regionformed by implantation may result in some implantation in the regionbetween the buried region and the surface through which the implantationtakes place. Thus, the regions illustrated in the drawings are schematicin nature and their shapes are not intended to illustrate the actualshape of a region of a device and are not intended to be limiting.

Unless otherwise defined, all terms (including technical and scientificterms) used herein have the same meaning as commonly understood by oneof ordinary skill in the art to which this disclosure is a part. Terms,such as those defined in commonly used dictionaries, should beinterpreted as having a meaning that is consistent with their meaning inthe context of the relevant art and will not be interpreted in anidealized or overly formal sense, unless expressly so defined herein.

FIG. 1 is a schematic perspective view of a device substrate 21 on whicha mask assembly 110 according to an exemplary embodiment and adeposition material are to be deposited. FIG. 2 is a partialcross-sectional view that schematically illustrates a blocking plate 113of FIG. 1 covering a second pixel NDP of the device substrate 21.

Referring to FIGS. 1 and 2, the mask assembly 110 may include a masksubstrate 111, a molding layer 112, and the blocking plate 113.

The mask assembly 110 may be on the device substrate 21 and may be usedto deposit a deposition material on a first pixel DP among pixelsincluding the first pixel DP and the second pixel NDP. Regarding thedevice substrate 21 illustrated in FIG. 1, only some elements of adisplay device 20 that will be described later with reference to FIG. 19are briefly illustrated for convenience in order to describe a structureof the mask assembly 110.

Each of the first pixel DP and the second pixel NDP does not refer to acertain pixel. That is, the first pixel DP refers to a pixel that is notcovered by the blocking plate 113 to be described later and on which adeposition material is deposited in a deposition process, and the secondpixel NDP refers to another pixel that is covered by the blocking plate113 and on which no deposition material is deposited in the depositionprocess. Accordingly, one blocking plate 113 may cover the second pixelNDP in a deposition process and may cover a pixel that was the firstpixel DP in a previous deposition process, in another deposition processthat is consecutively performed afterwards. That is, a particular pixelmay be the first pixel DP or the second pixel NDP in differentdeposition processes.

The mask substrate 111 may include a conductive material, and a firstalignment key AK1 may be at an edge of the mask substrate 111. The firstalignment key AK1 may penetrate the mask substrate 111, and although notillustrated, when the molding layer 112 is over the entire surface ofthe mask substrate 111, the first alignment key AK1 may penetrate themolding layer 112 or may penetrate both of the mask substrate 111 andthe molding layer 112.

A formation position of the first alignment key AK1 is not limited tothe edge of the mask substrate 111, and the first alignment key AK1 maybe at any position on the mask assembly 110 that corresponds to a secondalignment key AK2 that is at the device substrate 21. Instead ofpenetrating the mask substrate 111 or the molding layer 112, the firstalignment key AK1 may include the same material as a pixel-defininglayer 29 illustrated in FIG. 2 and may be on the mask substrate 111 orthe molding layer 112.

The first alignment key AK1 and the second alignment key AK2 may bedisposed on the mask substrate 111 and the device substrate 21,respectively, so as to overlap each other and may be arranged relativeto each other before a deposition process and during the depositionprocess. Thus, the mask substrate 111 and the device substrate 21 may bearranged relative to each other. That is, due to the arrangement of thefirst alignment key AK1 and the second alignment key AK2, the blockingplate 113 to be described later may accurately cover the second pixelNDP.

The molding layer 112 may be stacked on the mask substrate 111 and mayinclude a photoresist layer, such as an acrylic resin, polyimide (PI),or benzocyclobutene (BCB), a non-photosensitive organic material layer,or a non-photosensitive inorganic material layer. The molding layer 112may include a hole 112 h in a position that corresponds to the secondpixel NDP of the device substrate 21.

The blocking plate 113 may be detachable from the hole 112 h in themolding layer 112. As illustrated in FIG. 2, when the blocking plate 113is detached from the hole 112 h, the blocking plate 113 may cover thesecond pixel NDP and block a deposition material from being deposited onthe second pixel NDP. The blocking plate 113 may include a conductivematerial and may be pulled by a first magnetic member 30 and a secondmagnetic member 40 that will be described later.

FIG. 3 is a schematic conceptual diagram of an apparatus 100 formanufacturing a display device using the mask assembly 110 of FIG. 1.FIG. 4, FIG. 5, FIG. 6, and FIG. 7 are partial cross-sectional viewsthat sequentially illustrate the blocking plate 113 of FIG. 1 coveringthe second pixel NDP. FIG. 8 and FIG. 9 are partial cross-sectionalviews that schematically illustrate the blocking plate 113 of FIG. 1being separated from the second pixel NDP.

Referring to FIG. 3, the apparatus 100 may include the mask assembly110, a chamber 120, a vision unit 130, a deposition source 140, anadsorption unit 150, and a controller 160.

As described above, the mask assembly 110 may include the mask substrate111, the molding layer 112, and the blocking plate 113. However, forclarity and by no means limiting, only the blocking plate 113 that ismounted on the pixel-defining layer 29 to cover the second pixel NDP ina deposition process is illustrated in FIG. 3. A method of mounting theblocking plate 113 on the pixel-defining layer 29 so as to cover thesecond pixel NDP will be described later with reference to FIG. 4, FIG.5, FIG. 6, and FIG. 7.

The chamber 120 may include inner space for deposition and a gate valve121 installed on the enclosure of the chamber 120. The controller 160may control the gate valve 121 to open the internal space of the chamber120 or close the internal space of the chamber 120. The gate valve maybe any suitable mechanism for opening or closing the chamber such as asealable door. The mask assembly 110 as described above may be carriedinto or out of the chamber 120 through the gate valve 121.

The vision unit 130 may include a camera. In this regard, the visionunit 130 may be controlled by the controller 160 and may capturepositions of the device substrate 21 and the mask assembly 110 andprovide necessary data to the controller 160 in the time of arrangementof the device substrate 21 and the mask assembly 110.

The deposition source 140 may face the device substrate 21, and a sideof the deposition source 140 facing the device substrate 21 may be open.Also, the deposition source 140 may include a heater 141. The controller160 may control the heater 141 to heat a deposition material DM.

The adsorption unit 150 may be connected to the chamber 120 and may becontrolled by the controller 160 to maintain the pressure of the chamber120 at a predetermined level. In this regard, the adsorption unit 150may include a connection pipe 151 connected to the chamber 120 and apump 152 mounted on the connection pipe 151.

Regarding an operation of the apparatus 100 as described above, thecontroller 160 may control the gate valve 121 to open, and thus, thechamber 120 may be open. In this regard, the adsorption unit 150 may becontrolled by the controller 160 to adjust the inner pressure of thechamber 120 so as to be similar to atmospheric pressure.

When the gate valve 121 is controlled to be opened by the controller160, the device substrate 21 and the mask assembly 110 may be carriedinto the chamber 120 from the outside of chamber 120. In this regard,the device substrate 21 and the mask assembly 110 may be carried by arobot arm or shuttle controlled by the controller 160.

After the device substrate 21 and the mask assembly 110 are carried intothe chamber 120, the first alignment key AK1 and the second alignmentkey AK2 that may be respectively at the mask substrate 111 and thedevice substrate 21 may be arranged relative to each other to preparefor a deposition process. Also, a process of mounting the blocking plate130 of the mask assembly 110 on the pixel-defining layer 29 so as tocover the second pixel NDP may be performed. In this regard, the firstalignment key AK1 and the second alignment key AK2 may be arrangedrelative to each other not only before the deposition process begins butalso while the deposition process is performed.

Hereinafter, a method of mounting the blocking plate 113 on thepixel-defining layer 29 surrounding the second pixel NDP so as to coverthe second pixel NDP as illustrated in FIG. 3 will be described withreference to FIGS. 3, 4, 5, 6, and 7.

Referring to FIGS. 3, 4, 5, 6, and 7, the mask assembly 110 is disposedbelow the device substrate 21, and the first magnetic member 30 isdisposed above the device substrate 21. That is, the blocking plate 113of the mask assembly 110 may be carried into the chamber 120 while keptin the hole 112 h between molding layers 112 on the mask substrate 111.A position of the blocking plate 113 may correspond to that of thesecond pixel NDP between pixel-defining layers 29 on a surface of thedevice substrate 21 (refer to FIG. 4).

Next, the device substrate 21 may be moved toward the mask assembly 110and descend until the pixel-defining layer 29 contacts the blockingplate 113 (refer to FIG. 5). In this regard, although not illustrated,the device substrate 21 may be connected to a separate driving means(not shown) that may elevate the device substrate 21 between the firstmagnetic member 30 and the mask assembly 110.

After the pixel-defining layer 29 on the surface of the device substrate21 approaches the blocking plate 113, the first magnetic member 30disposed above the device substrate 21 may approach the device substrate21 (refer to FIG. 6). As the first magnetic member 30 approaches thedevice substrate 21 as such, the first magnetic member 30 may make theblocking plate 113 tightly adhere to the pixel-defining layer 29 bypulling the blocking plate 113 including a conductive material from thehole 112 h to the second pixel NDP.

Next, the first magnetic member 30, the device substrate 21, and theblocking plate 113 tightly adhering to the pixel-defining layer 29 ofthe device substrate 21 may be separated from the mask substrate 111 andthe molding layer 112 and ascend together. The mask substrate 111 andthe molding layer 112 may be then carried out of the chamber 120 (referto FIG. 7).

Afterwards, the chamber 120 may be closed, and as illustrated in FIG. 3,a deposition process may be performed while the blocking plate 113adheres to the pixel-defining layer 29 due to a pulling force of thefirst magnetic member 30 which covers the second pixel NDP. That is, theblocking plate 113 may prevent the deposition material DM from thedeposition source 140 from being deposited on the second pixel NDP inthe deposition process.

Next, the blocking plate 113 may be separated from the second pixel NDPafter the deposition process is completed. Referring to FIGS. 8 and 9,after the deposition process is completed, the mask substrate 111 andthe molding layer 112 may be carried into the chamber 120 again. In thisregard, the second magnetic member 40 for applying a pulling force tothe blocking plate 113 may be disposed below the mask substrate 111 andthe molding layer 112. After the deposition process is completed, thesecond magnetic field 40 may approach a lower side of the mask substrate111 and provide the pulling force to the blocking plate 113. In thisregard, the device substrate 21 may be separated from the first magneticmember 30 and descend towards the second magnetic member 40 (refer toFIG. 8).

Due to the descending of the device substrate 21, the blocking plate 113may be seated in the hole 112 h between the molding layers 112 on themask substrate 111, and when the second magnetic member 40 approachesthe lower side of the mask substrate 111, the blocking plate 113 may bepulled towards the second magnetic member 40. While the second magneticmember 40 approaches the lower side of the mask substrate 111 and seatsthe blocking plate 113 in the hole 112 h as such, the mask substrate 111and the second magnetic member 40 may descend, thereby separating theblocking plate 113 from the device substrate 21 (refer to FIG. 9).

As described above, when a deposition process is performed using themask assembly 110 according to an exemplary embodiment and the apparatus100 for manufacturing a display device including the mask assembly 110,even without using a separate shadow mask as in the related art, adeposition material may be deposited on the first pixel DP while thesecond pixel NDP is covered by the blocking plate 113.

A shadow mask of the related art has to be manufactured so as tocorrespond to a size of a device substrate on which a depositionmaterial is to be deposited. Accordingly, as the device substrate getsbigger, a large shadow mask has been required, and as the shadow maskgets bigger, there has been a problem that the shadow mask sags towardsa deposition source due to its weight.

In order to prevent the sagging, the shadow mask has been configured notas one shadow mask sheet that corresponds to one device substrate but asa division shadow mask that is divided into a plurality of numbers andtension-welded to a frame. However, such a shadow mask sheet or divisionshadow mask has a high unit cost, and when the shadow mask sheet ordivision shadow mask is used for a long time period, it has to beperiodically replaced because deposition patterns are transformed.

However, when the deposition process is performed using the maskassembly 110 according to an exemplary embodiment, the mask assembly 110may be manufactured by a simple process, a deposition process formanufacturing a high-resolution display device may be performedregardless of a size of a device substrate, and as long as the blockingplate 113 is periodically washed for long-term usage, cost may bedramatically saved.

Hereinafter, various modified examples of the blocking plate 113 will bedescribed with reference to FIG. 10, FIG. 11, FIG. 12, FIG. 13, FIG. 14,FIG. 15, FIG. 16, and FIG. 17.

FIG. 10 is a perspective plan view that schematically illustrates theblocking plate 113 of FIG. 1 covering each of second pixels NDP(R) andNDP(B). FIG. 11 is a plan view of a modified example of FIG. 10. FIG. 12is a plan view of another modified example of FIG. 10. FIG. 13 is a planview of another modified example of FIG. 10. FIG. 14 is a schematicperspective view of a mask assembly 410 including a blocking plate 413illustrated in FIG. 13. FIG. 15 is a plan view of a modified example ofFIG. 13. FIG. 16 is a plan view of a modified example of the blockingplate 113 illustrated in FIG. 2. FIG. 17 is a schematic perspective viewof a mask assembly 810 including a blocking plate 813 illustrated inFIG. 16.

FIG. 10 illustrates the blocking plate 113 of FIG. 1 covering each ofthe second pixels NDP(R) and NDP(B). In this regard, the second pixelNDP(R) may be a pixel that emits red light, and the other second pixelNDP(B) may be a pixel that emits blue light. A first pixel DP(G) that isnot covered by the blocking plate 113 may be a pixel that emits greenlight. Accordingly, the blocking plate 113 may cover each of the secondpixels NDP(R) and NDP(B) respectively emitting red light and blue lightand thus may leave the first pixel DP(G) open and cover each of thesecond pixels NDP(R) and NDP(B) so that a deposition material may bedeposited only on the first pixel DP(G) emitting green light, that is onthe device substrate 21.

In this regard, although it is illustrated in FIG. 10 for conveniencethat the deposition material is deposited on all of the first pixelDP(G) and the second pixels NDP(R) and NDP(B), exemplary embodiments arenot limited thereto. For example, when the blocking plate 113 coverseach of the second pixels NDP(R) and NDP(B) so that the depositionmaterial may be deposited on the first pixel DP(G) first, the depositionmaterial may not have been deposited on the second pixels NDP(R) andNDP(B). In addition, the deposition material may have been deposited ononly one of two second pixels NDP(R) and NDP(B).

Referring to FIG. 11, a blocking plate 213 may cover each of secondpixels NDP(G) and NDP(B). In this regard, the second pixel NDP(G) may bea pixel that emits green light, and the other second pixel NDP(B) may bea pixel that emits blue light. A first pixel DP(R) that is not coveredby the blocking plate 213 may be a pixel that emits red light.Accordingly, the blocking plate 213 may cover each of the second pixelsNDP(G) and NDP(B) respectively emitting green light and blue light andthus may leave the first pixel DP(R) open and cover each of the secondpixels NDP(G) and NDP(B) so that the deposition material may bedeposited only on the first pixel DP(R) emitting red light, that is onthe device substrate 21.

In this regard, although it is illustrated in FIG. 11 for convenience ofdescription that the deposition material is deposited on all of thefirst pixel DP(R) and the second pixels NDP(G) and NDP(B), exemplaryembodiments are not limited thereto. For example, when the blockingplate 213 covers each of the second pixels NDP(G) and NDP(B) so that thedeposition material may be deposited on the first pixel DP(R) first, thedeposition material may not have been deposited on the second pixelsNDP(G) and NDP(B). In addition, the deposition material may have beendeposited on only one of two second pixels NDP(G) and NDP(B).

Referring to FIG. 12, a blocking plate 313 may cover each of secondpixels NDP(R) and NDP(G). In this regard, the second pixel NDP(R) may bea pixel that emits red light, and the other second pixel NDP(G) may be apixel that emits green light. A first pixel DP(B) that is not covered bythe blocking plate 313 may be a pixel that emits blue light.Accordingly, the blocking plate 313 may cover each of the second pixelsNDP(R) and NDP(G) respectively emitting red light and green light andthus may leave the first pixel DP(B) open and cover each of the secondpixels NDP(R) and NDP(G) so that the deposition material may bedeposited only on the first pixel DP(B) emitting blue light, that is onthe device substrate 21.

In this regard, although it is illustrated in FIG. 12 for convenience ofdescription that the deposition material is deposited on all of thefirst pixel DP(B) and the second pixels NDP(R) and NDP(G), exemplaryembodiments are not limited thereto. For example, when the blockingplate 313 covers each of the second pixels NDP(R) and NDP(G) so that thedeposition material may be deposited on the first pixel DP(B) first, thedeposition material may not have been deposited on the second pixelsNDP(R) and NDP(G). In addition, the deposition material may have beendeposited on only one of two second pixels NDP(R) and NDP(G).

FIG. 13 illustrates the blocking plate 413 extending so as to cover aplurality of second pixels NDP(R) and NDP(G) that are adjacent to eachother. The first pixel DP(B) may be exposed to the deposition materialwhile in an open state that is not covered by the blocking plate 413.

FIG. 14 illustrates the blocking plate 413 of FIG. 13 included in themask assembly 410. That is, although the blocking plate 413 may coveronly one pixel as illustrated in FIG. 1, the disclosure is not limitedthereto, and the blocking plate 413 may have a polygonal shape extendingin a direction as illustrated in FIG. 14.

Referring to FIG. 15, a blocking plate 513 may cover a plurality ofsecond pixels NDP(R) and NDP(B). That is, the blocking plate 513 mayhave a polygonal shape that covers two second pixels NDP(B) that emitblue light and one second pixel NDP(R) that emits red light or may havea stick shape that covers two second pixels NDP(R) that emit red lightand one second pixel NDP(B) that emits blue light. The first pixel DP(G)that is not covered by the blocking plate 513 may be a device that emitsgreen light.

In this regard, although it is illustrated in FIG. 15 for convenience ofdescription that the deposition material is deposited on all of thefirst pixel DP(G) and the second pixels NDP(R) and NDP(B), exemplaryembodiments are not limited thereto. For example, when the blockingplate 513 covers the second pixels NDP(R) and NDP(B) so that thedeposition material may be deposited on the first pixel DP(G) first, thedeposition material may not have been deposited on the second pixelsNDP(R) and NDP(B). In addition, the deposition material may have beendeposited on only one of two types of second pixels NDP(R) and NDP(G).

FIG. 16 and FIG. 17 illustrate the blocking plate 613 in which anaccommodation hole 613 h that accommodates a spacer SP is formed in acase where the spacer SP protrudes from the pixel-defining layer 29. Inthis regard, the spacer SP may protrude from the pixel-defining layer 29disposed between pixels. Even in this case, the blocking plate 613 maybe disposed above the pixel-defining layer 29 so as to cover a pluralityof second pixels NDP(R) and NDP(G) as in the cases of the blockingplates 413 and 513 illustrated in FIG. 13, FIG. 14, and FIG. 15.

FIG. 18 is a plan view of the display device 20 manufactured by usingthe apparatus 100 for manufacturing a display device, illustrated inFIG. 7. FIG. 19 is a cross-sectional view taken along line XIX-XIX′ ofFIG. 18.

Referring to FIG. 18 and FIG. 19, in the display device 20, a displayarea DA and a non-display area outside the display area DA may bedefined on the device substrate 21. An emission unit D may be arrangedin the display area DA, and a power wiring (not shown) may be arrangedin the non-display area. Also, a pad unit C may be arranged in thenon-display area.

The display device 20 may include the device substrate 21 and theemission unit D. Also, the display device 20 may include a thin filmencapsulation layer E formed above the emission unit D. In this regard,the device substrate 21 may include a plastic material. Alternatively,the device substrate 21 may include a metal material, such as stainlesssteel (SUS) and titanium (Ti). Alternatively, the device substrate 21may include PI. Hereinafter, for convenience of description, the casewhere the device substrate 21 includes PI will be mainly described.

The emission unit D may be formed on the device substrate 21. In thisregard, the emission unit D may include a thin film transistor TFT, anda passivation layer 27 may be formed so as to cover the thin filmtransistor TFT. An organic light-emitting device (OLED) 28 may be formedon the passivation layer 27.

In this regard, the device substrate 21 may include a glass material.However, it is not limited thereto. The device substrate 21 may includea plastic material, or a metal material, such as SUS and Ti.Alternatively, the device substrate 21 may include PI. Hereinafter, forconvenience of description, the case where the device substrate 21includes a glass material will be mainly described.

A buffer layer 22 including an organic compound and/or an inorganiccompound may be further formed on the device substrate 21. The bufferlayer 22 may include silicon oxide (SiO_(X), where x≥1) or siliconnitride SiN_(Y) where Y≥1).

After an active layer 23 is formed on the buffer layer 22 in a certainpattern, the active layer 23 may be covered by a gate insulating layer24. The active layer 23 may include a source area 23-1, a drain area23-3, and a channel area 23-2 between the source area 23-1 and the drainarea 23-3.

The active layer 23 may include various materials. For example, theactive layer 23 may include at least one of an inorganic semiconductormaterial an oxide semiconductor material, and an organic semiconductormaterial. For example, the active layer 23 may include an inorganicsemiconductor material such as amorphous silicon or crystalline silicon.For convenience of description and by no means limiting, the case wherethe active layer 23 includes amorphous silicon will be mainly described.

After an amorphous silicon layer is formed on the buffer layer 22, theamorphous silicon layer is crystallized to form a polycrystallinesilicon layer, and then, the polycrystalline silicon layer may bepatterned to form the active layer 23. The source area 23-1 and thedrain area 23-3 of the active layer 23 may be doped with impuritiesaccording to the type of a thin film transistor, such as a driving thinfilm transistor (not shown) or a switching thin film transistor (notshown).

A gate electrode 25 corresponding to the active layer 23 and aninterlayer insulating layer 26 covering the gate electrode 25 may beformed on the gate insulating layer 24.

After a contact hole H1 is formed in the interlayer insulating layer 26and the gate insulating layer 24, a source electrode 27-1 and a drainelectrode 27-2 may be formed on the interlayer insulating layer 26 tocontact the source area 23-1 and the drain area 23-3, respectively.

The passivation layer 27 may be formed on the thin film transistor TFT,and a pixel electrode 28-1 of the OLED 28 may be formed on thepassivation layer 27. The pixel electrode 28-1 contacts the drainelectrode 27-2 of the thin film transistor TFT via a hole H2 in thepassivation layer 27.

The passivation layer 27 may include a single layer or layers includingan inorganic material and/or an organic material. The passivation layer27 may include a planarization layer to planarize a layer below thepassivation layer 27, no matter how curved the layer below thepassivation layer 27 is. Also, the passivation layer 27 may be formed soas to be curved in correspondence to a curved layer below thepassivation layer 27. The passivation layer 27 may include a transparentinsulator in order to achieve a resonance effect.

After the pixel electrode 28-1 is formed on the passivation layer 27,the pixel-defining layer 29, including at least one of an organicmaterial and an inorganic material, may be formed so as to cover thepixel electrode 28-1 and the passivation layer 27, and an opening isformed in the pixel-defining layer 29 so as to expose the pixelelectrode 28-1.

Then, an intermediate layer 28-2 and an opposite electrode 28-3 may beformed at least on the pixel electrode 28-1.

The pixel electrode 28-1 may serve as an anode, and the oppositeelectrode 28-3 may serve as a cathode. However, the polarities of thepixel electrode 28-1 and the opposite electrode 28-3 may be theopposite.

The pixel electrode 28-1 and the opposite electrode 28-3 may beinsulated from each other by the intermediate layer 28-2, and voltagesof different polarities may be applied to the intermediate layer 28-2 sothat light is emitted from an organic emission layer.

The intermediate layer 28-2 may include the organic emission layer.According to an exemplary embodiment, the intermediate layer 28-2 mayinclude the organic emission layer, and may further include at least oneof a hole injection layer (HIL), a hole transport layer (HTL), anelectron transport layer (ETL), and an electron injection layer (EIL).Exemplary embodiments are not limited thereto, and the intermediatelayer 28-2 may include the organic emission layer and may furtherinclude various other function layers (not shown).

In this regard, the intermediate layer 28-2 may be formed by using anapparatus (not shown) for manufacturing a display device as describedabove.

A unit pixel includes a plurality of sub-pixels, which may emit variouscolors of light. For example, the plurality of sub-pixels may includesub-pixels which emit red, green, and blue colors of light,respectively, and sub-pixels (not shown) which may emit red, green,blue, and white colors of light, respectively.

The thin film encapsulation layer E may include a plurality of inorganiclayers or may include an inorganic layer and an organic layer.

The organic layer of the thin film encapsulation layer E may include apolymer and may include a single layer or stacked layers including anyone of polyethylene terephthalate, PI, polycarbonate, epoxy,polyethylene, and polyacrylate. The organic layer may includepolyacrylate. In detail, the organic layer may include a polymerizedmonomer composition including a diacrylate-based monomer and atriacrylate-based monomer. The monomer composition may further include amonoacrylate-based monomer. Although the monomer composition may furtherinclude a general photoinitiator, such as diphenyl (2,4,6-trimethylbenzoyl) phosphine oxide (TPO), it is not limited thereto.

The inorganic layer of the thin film encapsulation layer E may include asingle layer or stacked layers including a metal oxide or a metalnitride. In detail, the inorganic layer may include any one of siliconnitride (SiN_(Y) where Y≥1), aluminum oxide (Al₂O₃, SiO₂), and titaniumdioxide (TiO₂).

An uppermost layer of the thin film encapsulation layer E, which isexposed to the outside, may include an inorganic layer which may preventwater penetration into the OLED 28.

The thin film encapsulation layer E may include at least one structurein which at least one organic layer is inserted between at least twoinorganic layers. As another example, the thin film encapsulation layerE may include at least one structure in which at least one inorganiclayer is inserted between at least two organic layers. As anotherexample, the thin film encapsulation layer E may include a structure inwhich at least one organic layer is inserted between at least twoinorganic layers and a structure in which at least one inorganic layeris inserted between at least two organic layers.

The thin film encapsulation layer E may sequentially include a firstinorganic layer, a first organic layer, and a second inorganic layer onthe OLED 28 in this order.

As another example, the thin film encapsulation layer E may sequentiallyinclude a first inorganic layer, a first organic layer, a secondinorganic layer, a second organic layer, and a third inorganic layer onthe OLED 28 in this order.

As another example, the thin film encapsulation layer E may sequentiallyinclude a first inorganic layer, a first organic layer, a secondinorganic layer, a second organic layer, a third inorganic layer, athird organic layer, and a fourth inorganic layer on the OLED 28 in thisorder.

A halogenated metal layer including lithium fluoride (LiF) may furtherbe included between the OLED 28 and the first inorganic layer. Thehalogenated metal layer may prevent damage to the OLED 28 when the firstinorganic layer is formed by sputtering.

An area of the first organic layer may be smaller than an area of thesecond inorganic layer, and an area of the second organic layer may besmaller than an area of the third inorganic layer.

Accordingly, the display device 20 includes the intermediate layer 28-2forming detailed patterns, and as the intermediate layer 28-2 isdeposited in an accurate position, the display device 20 may display adetailed image. Also, although repeatedly deposited, the intermediatelayer 28-2 may form consistent patterns, and thus, the display device 20displays uniform quality as it is continuously manufactured.

The controller 160 and/or one or more components thereof, may beimplemented via one or more general purpose and/or special purposecomponents, such as one or more discrete circuits, digital signalprocessing chips, integrated circuits, application specific integratedcircuits, microprocessors, processors, programmable arrays, fieldprogrammable arrays, instruction set processors, and/or the like. Inthis manner, the features, functions, processes, etc., described hereinmay be implemented via software, hardware (e.g., general processor,digital signal processing (DSP) chip, an application specific integratedcircuit (ASIC), field programmable gate arrays (FPGAs), etc.), firmware,or a combination thereof. As such, the controller 160 and/or one or morecomponents thereof may include or otherwise be associated with one ormore memories (not shown) including code (e.g., instructions) configuredto cause the controller 160 and/or one or more components thereof toperform one or more of the features, functions, processes, etc.,described herein.

The memories may be any medium that participates in providing code tothe one or more software, hardware, and/or firmware components forexecution. Such memories may be implemented in any suitable form,including, but not limited to, non-volatile media, volatile media, andtransmission media. Non-volatile media include, for example, optical ormagnetic disks. Volatile media include dynamic memory. Transmissionmedia include coaxial cables, copper wire and fiber optics. Transmissionmedia can also take the form of acoustic, optical, or electromagneticwaves. Common forms of computer-readable media include, for example, afloppy disk, a flexible disk, hard disk, magnetic tape, any othermagnetic medium, a compact disk-read only memory (CD-ROM), a rewriteablecompact disk (CDRW), a digital video disk (DVD), a rewriteable DVD(DVD-RW), any other optical medium, punch cards, paper tape, opticalmark sheets, any other physical medium with patterns of holes or otheroptically recognizable indicia, a random-access memory (RAM), aprogrammable read only memory (PROM), and erasable programmable readonly memory (EPROM), a FLASH-EPROM, any other memory chip or cartridge,a carrier wave, or any other medium from which information may be readby, for example, a controller/processor.

According to one or more of the above exemplary embodiments, a maskassembly is provided that may control deposition of a depositionmaterial with respect to each pixel regardless of a size of a mask, andan apparatus and method of manufacturing a display device using the maskassembly.

Although certain exemplary embodiments and implementations have beendescribed herein, other embodiments and modifications will be apparentfrom this description. Accordingly, the inventive concept is not limitedto such embodiments, but rather to the broader scope of the presentedclaims and various obvious modifications and equivalent arrangements.

What is claimed is:
 1. A mask assembly, comprising: a mask substrateconfigured to deposit a deposition material on a first pixel disposed ona device substrate comprising the first pixel and a second pixel; amolding layer stacked on the mask substrate and comprising a holecorresponding to a position of the second pixel disposed on the devicesubstrate; and a blocking plate detachably mounted in the hole andconfigured to block the second pixel from the deposition material bycovering the second pixel when the blocking plate is detached from thehole.
 2. The mask assembly of claim 1, wherein the mask substratecomprises a conductive material.
 3. The mask assembly of claim 1,wherein the molding layer comprises at least one of acrylic resin,polyimide (PI), benzocyclobutene (BCB), a non-photosensitive organicmaterial layer, and a non-photosensitive inorganic material layer. 4.The mask assembly of claim 1, wherein the hole extends to correspond topositions of a plurality of second pixels that are adjacent to eachother and disposed on the device substrate, and the blocking plateextends to cover the plurality of second pixels that are adjacent toeach other when the blocking plate is detached from the hole.
 5. Themask assembly of claim 1, wherein the blocking plate comprises aconductive material.
 6. The mask assembly of claim 1, wherein the devicesubstrate further comprises a first electrode, a pixel-defining layerpartially exposing the first electrode, and a spacer protruding from thepixel-defining layer, and the blocking plate comprises an accommodationhole that accommodates the spacer.
 7. The mask assembly of claim 1,wherein the device substrate comprises a first alignment key, and themask assembly comprises a second alignment key corresponding to thefirst alignment key.